A system-on-chip (SOC) is an integrated circuit (IC) that includes a plurality of different subsystems. The subsystems are included within a single chip substrate. The subsystems of the SOC are integrated to work cooperatively with one another. One example of an SOC is a chip level implementation of a computer or other data processing system. For example, the SOC may include a processor that executes program code such as an operating system and/or one or more applications. The processor operates cooperatively with one or more of the other on-chip subsystems. The other subsystems may be digital circuits, analog circuits, mixed-signal circuits, or the like. Exemplary subsystems that may be included within an SOC and operate cooperatively with a processor may include, but are not limited to, wireless transceivers, signal processors, CODECs, memory, memory controllers, I/O peripherals, and the like.
When designing an SOC, the designer must determine those portions of the design that will remain as executable program code and, as such, will be executed by a processor and those portions of the design that are to be implemented in hardware. Portions of the design selected for implementation in hardware are said to be “hardware accelerated.” In this regard, a circuit or circuit block implementation of a portion of a design, e.g., a software function, may be called a “hardware accelerator.”
One of the challenges in designing an SOC is determining which portions of the design should be hardware accelerated and which should not. In the case of a complex design, there are a significant number of alternative architectures where each architecture hardware accelerates different portions and/or different combinations of portions of the design. Testing each alternative architecture by actually implementing the design in hardware may take hours or even days of work for each hardware accelerated section. This makes evaluating different alternative architectures for a design infeasible.